Axil 320 System Block Diagram

 
    FIGURE

********************************************************************************

        |-----------|  |-----------|
        |           |  |           |                          NVSIMMs
        | Processor |  | Processor |                       |-----------|
        | Modules   |  | Modules   |    ===========     ---|-----------| 
        |           |  |           |    |   RMC   | ----|           
        |-----------|  |-----------|    ===========     ---|-----------|
              |              |               |             |-----------|
              |              |               |                DRAMSIMMs 
              |              |               |             |-----------|
              |              |               |             |-----------| 
              |              |               |
        ================================================================
                                |     50Mhz MBus
                                |
                          |-----------|                 +--<  Floppy  > 
                          |    M2S    |                 |
                          |-----------|                 |--< Port A/B >
                                |                       |
        =    =========          |   ===========         |--< Bootprom >
        |>---| CODEC |--+       |---|   SEC   |---------|
        =    =========  |       |   ===========         +--<  NVRAM   >
                 |      |       |   ==========+-----------+
                 |  =========   |---|  MACIO  +-----------|--------+
                 |  | DBRI  |   |   ==========+-----+     |        |
          ===    |  |       |---|   OnBoard SCSI----|     |        |  
   LineIn |O-----+  |16-bit |   |                   |     |        |
   LineOut|O        | Audio |   |   ========== |        |
   MicIN  |O        =========   |   | ============        |        |
   HeadOut|O                    |---==| ============     |
          ===                   |     ==| ============             |
        external                |       ==|Sbus Slots|        
      stereo jacks              |         ============
                         25Mhz  |
                     64-bit Extended Sbus

********************************************************************************

    MBUS TO SBUS CONTROLLER (M2S) ASIC
    Axil

	* 50-20/40-25 Mhz M-to-S Asynchronous operating mode as well as 50-25/40	  -20Mhz Synchronous operating mode.
	* Level 2 Mbus protocol.
	* 64-bit Sbus extended transfer.
	* 32-byte burst transfer.
	* Support for 5 Mbus masters and 7 Sbus slaves.

    RELIABLE MEMORY CONTROLLER (RMC) ASIC
    Axil

	* 40-50 Mhz operation with programmable RAM timing.
	* Level 1 & 2 Mbus slave interface.
	* Level 2 coherent invalidate support.
	* Supports SPARC sub-block ordering.
	* Uses a single-bit correction multi-bit detection(SEC-DEC-S4ED) ECC
	  scheme.